ANALOGUE to DIGITAL (A/D) Converter in PIC16F87X Series

ANALOGUE to DIGITAL (A/D) Converter

What is a Sample & Sample rate?

A "sample" is a single measurement of amplitude.
Sample rate is simply the number of samples (or measurements of amplitude) taken per second.

Sampling Intervals

Quantization

The samples are assigned a binary number approximating their sampled value.

Quantizing divides up the sampled voltage range into 2n-1 quantizing intervals, where “n” is the number of bits per sample (the sampling resolution). For example, an 8-bit system can identify 28 (256) discrete sampled signal values (255 quantizing intervals).

The amplitude of such a signal can occupy the entire quantizing range.

A/D Reference Voltages

Successive Approximation A/D

Example 1

Example 2 

Example 3

A/D Converter Modules in PIC16F87X series

28-pin devices has 5 modules. (AN0-AN4) 

       PIC16F873
       PIC16F876

40-pin devices has 8 modules. (AN0-AN7) 

      PIC16F874
      PIC16F877

A/D Features

•The analogue input charges a sample and hold capacitor.
•Use successive approximation method.
•10 bit resolution.
•Software selectable reference voltages.
•Able to operate while device is in SLEEP mode.

Registers assigned to A/D

•A/D result high register (ADRESH)
•A/D result low register (ADRESL)
•A/D Control register 0 (ADCON0)
•A/D Control register 1 (ADCON1)

A/D Acquisition Requirements

•For the A/D converter to meet its specified accuracy, the charge holding capacitor (CHOLD) must be allowed to fully charge to the input channel voltage level.
•After the analog input channel is selected (changed), this acquisition must be done before the conversion can be started.

ACQUISITION TIME

Selecting the A/D Conversion Clock

•The A/D conversion time per bit is defined as TAD.
•The A/D conversion requires a minimum 12TAD per 10-bit conversion.
•The four possible options for TAD are,
• 2TOSC
• 8TOSC
• 32TOSC
• Internal A/D module RC oscillator (2-6 μs)

TAD time & A/D Conversion TAD cycles

Steps for A/D Conversion

Step1. Configure the A/D module:
Configure analog pins/voltage reference and digital I/O (ADCON1)
Select A/D input channel (ADCON0)
Select A/D conversion clock (ADCON0)
Turn on A/D module (ADCON0)

Step2. Configure A/D interrupt (if desired):
Clear ADIF bit
Set ADIE bit
Set PEIE bit
Set GIE bit

Step3. Wait the required acquisition time.

Step4. Start conversion:
Set GO/DONE bit (ADCON0)

Step5. Wait for A/D conversion to complete, by either:
Polling for the GO/DONE bit to be cleared (with interrupts enabled); OR
Waiting for the A/D interrupt

Step6. Read A/D result register pair (ADRESH:ADRESL), clear bit ADIF if required. 

Step7.
For the next conversion, go to step 1 or step 2, as required. The A/D conversion time per bit is defined as TAD. A minimum wait of 2TAD is required before the next acquisition starts.

A/D RESULT REGISTERS

•16 bit wide ADRESH:ADRESL register pair is the location where the 10-bit A/D result is loaded at the completion of the A/D conversion.
•The A/D module gives the flexibility to left or right justify the 10-bit result in the 16-bit result register.
•The A/D Format Select bit (ADFM) controls this justification.